โ What is a Common Bus System?
A Common Bus System is an internal data transfer system where a single set of lines (bus) is used to transfer information between registers, memory, ALU, and I/O devices in a computer.
It reduces the number of interconnections and simplifies control logic.
๐ข Why 16-bit?
- The bus is 16 bits wide, meaning it can transfer 16 bits of data at a time.
- All registers, the Arithmetic Logic Unit (ALU), and memory unit work with 16-bit words.
๐ Major Components of the 16-bit Common Bus System
| Component | Function |
|---|---|
| Registers (AC, DR, IR, PC, AR, TR) | Temporary storage units for data and addresses |
| Memory Unit | Stores instructions and data |
| ALU | Performs arithmetic and logic operations |
| Control Unit | Directs the operation of the CPU using control signals |
| Multiplexers (MUX) | Select one source register to place data on the bus |
| Bus (16-bit) | Shared data path for transfers between components |
๐งฉ Structure of 16-bit Common Bus System
โ Main Registers Involved
- AC (Accumulator) โ for ALU operations
- DR (Data Register) โ holds data from memory
- IR (Instruction Register) โ holds instruction fetched from memory
- PC (Program Counter) โ holds address of next instruction
- AR (Address Register) โ holds memory addresses
- TR (Temporary Register) โ temporary data storage
- INPR / OUTR โ for input/output operations
๐ Bus Lines
- 16 data lines โ carry data/instructions/addresses
- Control lines โ manage read, write, and load operations
โ๏ธ How Does Data Transfer Happen?
- Select Source Register
- MUX selects one register to place its value on the bus
- Data Travels on the Bus
- 16 bits move simultaneously across the bus
- Enable Destination Register
- Control unit enables destination register to accept the value from the bus
๐ Example Operations
๐น Example 1: Copy DR to AC
- Select DR as source (MUX signal)
- Enable AC to load value from bus
๐น Example 2: Fetch Instruction from Memory
- AR โ PC
- Memory Read
- Data from memory โ DR (via bus)
๐ Control Signals
Control signals manage:
- Register selection
- Data movement
- Memory read/write
- ALU operation
The control unit uses timing signals (T0, T1, T2…) to coordinate micro-operations.
๐ Advantages of Common Bus System
- โ Fewer wires and connections
- โ Simpler CPU design
- โ Easy to manage internal data transfers
- โ Ideal for teaching and small-scale systems
โ ๏ธ Limitations
- โ Only one operation at a time (shared bus)
- โ Slower than systems with multiple buses
- โ Needs control logic to manage all transfers
๐ง Conclusion
The 16-bit Common Bus System demonstrates how data and instructions flow within a computer using a single, shared bus. It is essential for understanding:
- CPU architecture
- Instruction execution
- Micro-operations
It lays the foundation for deeper topics like microprogramming, pipelining, and RISC/CISC architectures.
